PCB solderability testing evaluates how reliably molten solder wets the conductive surfaces, pads, and plated through-holes of a printed circuit board, helping manufacturers prevent assembly defects such as non-wetting, dewetting, and poor hole fill. This guide explains the applicable standards, sample requirements, core test items, industry-recognized test methods, and acceptance criteria used by professional testing laboratories.
Technical Overview
PCB solderability testing is a standardized evaluation of the ability of a printed circuit board's metal surfaces to be wetted by molten solder under controlled temperature, flux, and time conditions. Good solderability means the solder spreads smoothly over the pad or into the plated through-hole and forms a sound metallurgical bond through a continuous intermetallic layer. Poor solderability leads directly to assembly defects, including non-wetting, dewetting, pinholes, voids, insufficient hole fill, and weak joints that compromise long-term reliability.
Because surface finishes degrade over time due to oxidation, contamination, and intermetallic growth, solderability testing is typically performed both on as-received boards and on artificially aged samples that simulate extended storage. Testing is conducted in accordance with internationally recognized standards, including:
- IPC J-STD-003, Solderability Tests for Printed Boards
- IPC J-STD-002, Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires
- IPC-TM-650 Method 2.4.12, Solderability, Edge Dip
- IEC 60068-2-20, Environmental Testing, Test T: Soldering (dip and globule methods)
- IEC 60068-2-54 and IEC 60068-2-69, wetting balance methods for through-hole and surface-mount devices
- MIL-STD-883 Method 2003 and JEDEC JESD22-B102 for component-level evaluation
Testing Samples
Bare PCBs and Test Coupons
The primary sample is a bare, unassembled printed circuit board or a dedicated test coupon fabricated on the same panel with the same surface finish, copper weights, and plating chemistry. Coupons are preferred for routine lot testing because the dip-and-look and wetting balance methods are destructive. When finished boards are used, the tested area must not contain solder mask that would interfere with solder contact.
Surface Finish Types
Solderability behavior varies significantly by finish, so the finish type must be recorded with every result. Commonly evaluated finishes include:
- HASL and lead-free HASL (hot air solder leveling)
- ENIG (electroless nickel immersion gold) and ENEPIG
- OSP (organic solderability preservative)
- Immersion silver
- Immersion tin
- Electroplated nickel and gold, used for connector and press-fit areas
Handling and Preconditioning
Samples must be handled with clean gloves or tweezers, since fingerprints and airborne contamination can distort results. Before testing, samples may be conditioned by steam aging, most commonly 8 hours, to simulate natural storage degradation and verify the durability class of the finish. Both fresh and aged conditions are frequently tested in parallel to establish shelf-life expectations.
Testing Items
A complete solderability evaluation typically covers the following items, with results documented against the acceptance class applicable to the product:
- Solder wetting coverage on pads, traces, and lands, with a typical acceptance target of 95 percent or greater coverage of the tested area
- Wetting and capillary rise (wicking) of molten solder in plated through-holes and vias
- Identification of non-wetting, dewetting, pinholes, voids, and exposed basis metal after solder immersion
- Durability of the surface finish after steam-aging preconditioning
- Hole-fill performance relevant to wave soldering and pin-in-paste assembly
- Uniformity of finish across the panel, checked by sampling multiple locations
Testing Methods
Dip and Look (Edge Dip) Test
The dip-and-look method is the most widely used qualitative test for bare PCBs. The sample is fluxed, then immersed edge-first into a static molten solder pot, typically at 235 degrees Celsius for tin-lead alloys or in the range of 245 to 260 degrees Celsius for lead-free alloys such as SAC305, depending on the specified test condition. After a controlled dwell of several seconds and a controlled withdrawal rate, the board is cleaned and examined under magnification, typically 10x. Acceptance generally requires at least 95 percent wetting coverage of the evaluated surfaces with no continuous areas of exposed basis metal.
Wetting Balance (Meniscograph) Test
The wetting balance test provides quantitative force-versus-time data. A fluxed specimen is suspended from a sensitive load cell and immersed a fixed depth into molten solder. As wetting proceeds, the buoyancy-dominated initial force transitions to a net downward wetting force. Key metrics include the zero-cross time, the wetting force at two and five seconds, and the maximum wetting force. This method is ideal for comparing finishes, evaluating marginal lots, and validating storage-life studies because it detects degradation trends before visible failure occurs.
Globule Test
The globule test is applied mainly to component leads and wire terminations rather than board surfaces. A small solder globule, commonly 200 milligrams, is melted on a heated block at approximately 235 degrees Celsius, and the termination is inserted into it. The time required for the molten solder to completely surround and rise up the lead is measured, with wetting typically required within about two seconds.
Rotary Dip Test
The rotary dip test evaluates flat surface-mount pads. A coupon is mounted on a rotating arm that sweeps the pad face through the solder surface for a programmable contact time. By progressively varying the contact time, the laboratory determines the minimum wetting time, which is valuable for assessing whether fine-pitch SMT pads will wet within realistic reflow process windows.
Acceptance Criteria
Acceptance is judged against the product's IPC class and the invoking specification. In general, Class 2 and Class 3 products require a minimum of 95 percent solder coverage on tested features, no more than 5 percent combined area of defects such as pinholes, dewetting, and non-wetting, no exposed basis metal, and demonstrated through-hole wetting consistent with the applicable hole-fill requirement.
Applications
PCB solderability testing supports quality control and reliability engineering across the electronics manufacturing supply chain. Typical use cases include incoming inspection of fabricated board lots, qualification of new fabricators or finish chemistries, periodic surveillance of established suppliers, validation of storage and shelf-life limits, and root-cause investigation of assembly defects such as insufficient barrel fill or pad non-wetting.
The test is especially critical in sectors where joint reliability is non-negotiable:
- Automotive electronics, including engine control, ADAS, and battery management systems
- Aerospace and defense avionics subject to Class 3 acceptance requirements
- Telecommunications infrastructure and high-reliability server hardware
- Medical devices and implantable or life-support electronics
- Industrial controls, power electronics, and instrumentation
- Consumer electronics during new product introduction and finish changes
FAQ
Which standard applies to bare PCB solderability testing?
IPC J-STD-003 is the governing standard for printed board solderability, defining sample preparation, conditioning, dip, wetting balance, and rotary dip procedures. Component leads and terminations are evaluated separately under IPC J-STD-002, while IEC 60068-2 series methods are commonly referenced in international specifications.
What does the 95 percent coverage criterion mean?
It means that after the solder immersion, at least 95 percent of each evaluated surface or feature area must be covered by a continuous, smooth solder film. The remaining area may show only minor isolated defects such as pinholes or dewetting, provided basis metal is not exposed in a continuous or functional area.
Is solderability testing destructive?
Yes. Dip-and-look, wetting balance, globule, and rotary dip tests all alter the tested surfaces permanently. For this reason, manufacturers typically submit dedicated coupons from the production panel or allocate sacrificial boards rather than testing sellable product.
How does lead-free testing differ from tin-lead testing?
Lead-free testing uses higher solder bath temperatures, typically 245 to 260 degrees Celsius for SAC alloys compared with about 235 degrees Celsius for tin-lead, along with lead-free-compatible fluxes and finishes. The evaluation criteria remain similar, but the higher thermal load makes finish durability and aging behavior even more important to verify.
Why is steam aging performed before testing?
Steam aging accelerates the oxidation and degradation that occur during real-world storage of PCBs. Testing aged samples, commonly after 8 hours of steam exposure, verifies that the finish will still deliver acceptable solderability after realistic warehouse dwell times, which is essential for setting shelf-life and stocking policies.
How often should PCB solderability testing be performed?
For Class 3 and high-reliability products, testing is commonly performed on each fabrication lot or on a defined sampling plan. For Class 2 products, testing is typically performed at supplier qualification, after any finish or process change, and periodically thereafter, or whenever assembly defects suggest degraded finish performance.